姓名:张岩龙
职称:副教授
研究方向: 射频、模拟/混合信号集成电路与系统
邮箱:yanlong.zhang@xjtu.edu.cn
个人主页:http://gr.xjtu.edu.cn/web/yanlong.zhang
1、个人简介:
张岩龙,博士,分别于2011年、2018年在西安电子科技大学获得微电子学专业学士学位和微电子学与固体电子学博士学位。研究生期间获得国家奖学金,主要从事超宽带射频集成电路设计的相关研究工作。2015年10至2017年11月,作为国家公派联合培养博士研究生赴美国德州大学奥斯汀分校(UT Austin)留学,主要从事低噪声锁相环设计和时间域数据转换器设计的相关研究工作。2018年7月入职西安交通大学米兰平台。
2、研究领域或方向:
Ø 模拟/混合信号集成电路(Analog/mixed-signal ICs,AMS ICs)
Ø 射频、毫米波集成电路与系统(RF & Millimeter-wave ICs and systems)
Ø 模拟/混合信号集成电路自动化设计技术(Design automation for AMS IC)
3、正在或曾经承担的科研项目:
主持国家自然科学基金青年科学基金项目1项,陕西省高校科协青年人才托举计划项目1项,中央高校基本科研业务费项目1项,横向课题多项。
作为骨干研究人员参与国家自然科学基金面上项目2项,国家自然科学基金青年科学基金项目1项,中央高校基本科研业务费项目1项。
4、获奖情况及科研成果:
1)发表论文
期刊论文:
[1] Xiaoyan Gui, Renjie Tang, Yanlong Zhang, Dan Li, and Li Geng, “A Voltage-Controlled Ring Oscillator With VCO-Gain Variation Compensation,” IEEE Microwave and Wireless Components Letters, vol. 30, no. 3, pp. 288–291, Mar. 2020.
[2] Yanlong Zhang, Arindam Sanyal, Xueyi Yu, Xing Quang, Kailin Wen, Xiyuan Tang, Gang Jin, Li Geng, and Nan Sun, “A Fractional-N PLL With Space-Time Averaging for Quantization Noise Reduction,” IEEE Journal of Solid-State Circuits, vol. 55, no. 3, pp. 602–614, Mar. 2020. (CICC invited submission)
[3] Arindam Sanyal, Xueyi Yu, Yanlong Zhang, and Nan Sun, “Fractional-N PLL with multi-element fractional divider for noise reduction,” Electronics Letters, vol. 52, no. 10, pp. 809–810, May 2016.
[4] Xing Quan, Yiqi Zhuang, Zhenrong Li, Yanlong Zhang, Kai Jing. “A 2–22GHz low-imbalanced active balun in 0.18μm SiGe BiCMOS technology”. AEU-International Journal of Electronics and Communications, vol. 70, no. 10, pp. 1367–1373, Oct. 2016.
[5] Xing Quan, Yiqi Zhuang, Zhenrong Li, Yanlong Zhang, Kai Jing, and Jinsong Zhan. “Current generator for 6-bit active phase shifter”. Electronics Letters, vol. 51, no. 15, pp. 1175–1177, Jul. 2015.
[6] Yanlong Zhang, Yiqi Zhuang, Zhenrong Li, Hongyun Li, Xing Quan, Bo Wang, and Xiaojiao Ren. “A CMOS semi-distributed step attenuator with low insertion loss and low phase distortion”. IEICE Electronics Express, vol. 11, no. 12, pp. 1–5, Jun. 2014.
[7] Kai Jing, Yiqi Zhuang, Zhenrong Li, Yongqian Du, Yanlong Zhang. A SiGe HBT low noise amplifier using on-chip notch filter for K band wireless communication, Microelectronics Journal, vol. 45 no. 6, pp. 683–689, Jun. 2014.
[8] Yanlong Zhang, Yiqi Zhuang, Zhenrong Li, Xing Quan, and Xiaojiao Ren. “A broadband 5-bit CMOS step attenuator in small area with low insertion loss”. IEICE Electronics Express, vol. 11, no. 9, pp. 1–5, May 2014.
[9] Yanlong Zhang, Yiqi Zhuang, Zhenrong Li, Xiaojiao Ren, Bo Wang, Kai Jing, and Zengwei Qi. “A 5-bit lumped 0.18-μm CMOS step attenuator with low insertion loss and low phase distortion in 3–22 GHz applications”. Microelectronics Journal, vol. 45, no. 4, pp. 468–476, Apr. 2014.
会议论文:
[1] Shengyu Liang, Youze Xin, Chenglong Liang, Bin Zhang, Yanlong Zhang, Xiaoli Wang, Li Geng, “A 0.025% DC Current Mismatch Charge Pump for PLL Applications,” in Proc. IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Apr. 2021, pp. 700–703.
[2] Liheng Liu, Yanlong Zhang, Li Dong, Youze Xin, Shengwei Gao, Li Geng, “A Power Efficient ECG Front-End with Input-Adaptive Gain Reaching 67.6-dB Dynamic Range,” in Proc. IEEE Asian Solid-State Circuits Conference (A-SSCC), Apr.2020, pp. 1–4.
[3] Yanlong Zhang, Arindam Sanyal, Xing Quan, Kailin Wen, Xiyuan Tang, Gang Jin, Li Geng, and Nan Sun, “A 2.4-GHz ΔΣ fractional-N synthesizer with space-time averaging for noise reduction,” in Proc. IEEE Custom Integrated Circuits Conference (CICC), Apr. 2019, pp. 1–4.
2)出版著作
[1] 贾新章, 游海龙, 高海霞, 张岩龙. 电子线路CAD 与优化设计——基于Cadence/PSpice, 北京: 电子工业出版社, 2014.
3)邀请报告
[1] 2020.12, "Noise Reduction for Fractional-N Phase-Locked Loops", IEEE 2nd International Conference on Circuits and Systems(IEEE ICCS 2020).
[2] 2020.06, "A Fractional-N PLL With Space–Time Averaging for Quantization Noise Reduction", 第二届华人芯片设计技术研讨会(ICAC 2020).
5、指导研究生和本科生情况:
2018年至今,共指导研究生5名,指导10名本科生完成毕业设计。
本团队主要从事射频、模拟/混合信号集成电路与系统的前沿技术与实践应用的相关研究,欢迎有志从事集成电路设计前沿技术研究、基础知识扎实、成绩优秀的同学加入我们!
6、联系方式:
Email:yanlong.zhang@xjtu.edu.cn
办公地址:1) 西安交通大学创新港鸿理楼4-4038
2) 西安市咸宁西路28号西安交通大学西一楼238